This CMOS circuit divides the frequency of a rectangular signal up to 2 MHz by 6. The supply voltage influences the maximum division speed and can be between 3 and 15 V typically. The output signal does not have a 50% active cycle.
This CMOS circuit divides the frequency of a rectangular signal up to 2 MHz by 6. The supply voltage influences the maximum division speed and can be between 3 and 15 V typically. The output signal does not have a 50% active cycle.
